Martin Zabel
I'm a software engineer at pls Development Tools. Formerly, i was a teacher and research scientist at the Technische Universität Dresden, Germany. I'm also one of the authors of the PoC-Library on GitHub.
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Germany
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Member for 5 years, 5 months
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Last seen Mar 20 '16 at 13:06
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- 11 copy data from kernel space to user space
- 10 wait statement must contain condition clause with UNTIL keyword
- 9 Unable to write on /dev/* files
- 7 VHDL simulation shows 'X' for input
- 7 Xilinx ISE warns that a signal is trimmed since it has a constant value of 0, but the signal is used within my code
- 7 Do I need to reset my FPGA design after startup?
- 6 x86 Intel Assembly and C++ - Stack around array corrupted
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